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| MCP4801/4811/4821 8/10/12-Bit Voltage Output Digital-to-Analog Converter with Internal VREF and SPI Interface Features * * * * * * * * * * * * MCP4801: 8-Bit Voltage Output DAC MCP4811: 10-Bit Voltage Output DAC MCP4821: 12-Bit Voltage Output DAC Rail-to-Rail Output SPI Interface with 20 MHz Clock Support Simultaneous Latching of the DAC Output with LDAC Pin Fast Settling Time of 4.5 s Selectable Unity or 2x Gain Output 2.048V Internal Voltage Reference 50 ppm/C VREF Temperature Coefficient 2.7V to 5.5V Single-Supply Operation Extended Temperature Range: -40C to +125C Description The MCP4801/4811/4821 devices are single channel 8-bit, 10-bit and 12-bit buffered voltage output Digital-to-Analog Converters (DACs), respectively. The devices operate from a single 2.7V to 5.5V supply with an SPI compatible Serial Peripheral Interface. The devices have a high precision internal voltage reference (VREF = 2.048V). The user can configure the full-scale range of the device to be 2.048V or 4.096V by setting the Gain Selection Option bit (gain of 1 of 2). The devices can be operated in Active or Shutdown mode by setting a Configuration register bit or using the SHDN pin. In Shutdown mode, most of the internal circuits, including the output amplifier, are turned off for power savings, while the amplifier output (VOUT) stage is configured to present a known high resistance output load (500 k typical. The devices include double-buffered registers, allowing a synchronous update of the DAC output using the LDAC pin. These devices also incorporate a Power-on Reset (POR) circuit to ensure reliable powerup. The devices utilize a resistive string architecture, with its inherent advantages of low DNL error, low ratio metric temperature coefficient and fast settling time. These devices are specified over the extended temperature range (+125C). The devices provide high accuracy and low noise performance for consumer and industrial applications where calibration or compensation of signals (such as temperature, pressure and humidity) are required. The MCP4801/4811/4821 devices are available in the PDIP, SOIC, MSOP and DFN packages. Applications * * * * * Set Point or Offset Trimming Sensor Calibration Precision Selectable Voltage Reference Portable Instrumentation (Battery-Powered) Calibration of Optical Communication Devices Related Products(1) P/N MCP4801 MCP4811 MCP4821 MCP4802 MCP4812 MCP4822 MCP4901 MCP4911 MCP4921 MCP4902 MCP4912 MCP4922 DAC Resolution 8 10 12 8 10 12 8 10 12 8 10 12 No. of Channel 1 1 1 2 2 2 1 1 1 2 2 2 External Internal (2.048V) Voltage Reference (VREF) Note 1: The products listed here have similar AC/DC performances. 2010 Microchip Technology Inc. DS22244B-page 1 MCP4801/4811/4821 Package Types PDIP, SOIC, MSOP MCP48X1 VDD 1 CS 2 SCK 3 SDI 4 8 VOUT 7 VSS 6 SHDN 5 LDAC VDD CS DFN (2x3)* 1 2 9 8 VOUT 7 VSS 6 SHDN 5 LDAC SCK 3 SDI 4 MCP4801: 8-bit single DAC MCP4811: 10-bit single DAC MCP4821: 12-bit single DAC * Includes Exposed Thermal Pad (EP); see Table 3-1. Block Diagram LDAC CS SDI SCK Interface Logic Power-on Reset Input Register VDD VSS DAC Register VREF (2.048V) String DAC Output Op Amp Output Logic Gain Logic SHDN VOUT DS22244B-page 2 2010 Microchip Technology Inc. MCP4801/4811/4821 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings VDD ............................................................................................................. 6.5V All inputs and outputs .....................VSS - 0.3V to VDD + 0.3V Current at Input Pins ....................................................2 mA Current at Supply Pins ...............................................50 mA Current at Output Pins ...............................................25 mA Storage temperature .....................................-65C to +150C Ambient temp. with power applied ................-55C to +125C ESD protection on all pins 4 kV (HBM), 400V (MM) Maximum Junction Temperature (TJ) . .........................+150C ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF, TA = -40 to +85C. Typical values are at +25C. Parameters Power Requirements Operating Voltage Operating Current Sym VDD IDD Min 2.7 -- Typ -- 330 Max 5.5 400 Units Conditions A All digital inputs are grounded, analog output (VOUT) is unloaded. Code = 000h POR circuit is turned off POR circuit remains turned on Hardware Shutdown Current Software Shutdown Current Power-on Reset Threshold DC Accuracy MCP4801 Resolution INL Error DNL MCP4811 Resolution INL Error DNL MCP4821 Resolution INL Error DNL Offset Error Offset Error Temperature Coefficient Gain Error Gain Error Temperature Coefficient Note 1: 2: ISHDN ISHDN_SW VPOR -- -- -- 0.3 3.3 2.0 2 6 -- A A V n INL DNL n INL DNL n INL DNL VOS VOS/C gE G/C 8 -1 -0.5 10 -3.5 -0.5 12 -12 -0.75 -1 -- -- -2 -- -- 0.125 0.1 -- 0.5 0.1 -- 2 0.2 0.02 0.16 -0.44 -0.10 -3 -- 1 +0.5 -- 3.5 +0.5 -- 12 +0.75 1 -- -- 2 -- Bits LSb LSb Bits LSb LSb Bits LSb LSb ppm/C ppm/C Note 1 -45C to +25C +25C to +85C % of FSR Code = 0x000h Note 1 Note 1 % of FSR Code = 0xFFFh, not including offset error ppm/C Guaranteed monotonic by design over all codes. This parameter is ensured by design, and not 100% tested. 2010 Microchip Technology Inc. DS22244B-page 3 MCP4801/4811/4821 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF, TA = -40 to +85C. Typical values are at +25C. Parameters Internal Reference Voltage Temperature Coefficient (Note 2) Sym VREF Min 2.008 -- Typ 2.048 125 0.25 45 0.09 290 1.2 1.0 400 0.01 to VDD - 0.04 66 0.55 15 4.5 Max 2.088 325 0.65 160 0.32 -- -- -- -- -- Units V ppm/C LSb/C ppm/C LSb/C Vp-p V/Hz V/Hz Hz V Conditions VOUT when G = 1x and Code = 0xFFFh -40C to 0C -40C to 0C 0C to +85C 0C to +85C Code = 0xFFFh, G = 1x Code = 0xFFFh, G = 1x Code = 0xFFFh, G = 1x Internal Voltage Reference (VREF) VREF/C -- -- -- -- -- -- -- -- Output Noise (VREF Noise) Output Noise Density ENREF (0.1-10 Hz) eNREF (1 kHz) eNREF (10 kHz) 1/f Corner Frequency Output Amplifier Output Swing fCORNER VOUT Phase Margin Slew Rate Short Circuit Current Settling Time PM SR ISC tSETTLING -- -- -- -- -- -- 24 -- Degree () CL = 400 pF, RL = V/s mA s Accuracy is better than 1 LSb for VOUT = 10 mV to (VDD - 40 mV) Within 1/2 LSb of final value from 1/4 to 3/4 full-scale range 1 LSb change around major carry (0111...1111 to 1000...0000) Dynamic Performance (Note 2) Major Code Transition Glitch -- 45 -- nV-s Digital Feedthrough Note 1: 2: -- <10 -- nV-s Guaranteed monotonic by design over all codes. This parameter is ensured by design, and not 100% tested. DS22244B-page 4 2010 Microchip Technology Inc. MCP4801/4811/4821 ELECTRICAL CHARACTERISTIC WITH EXTENDED TEMPERATURE Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF. Typical values are at +125C by characterization or simulation. Parameters Power Requirements Operating Voltage Operating Current Sym VDD IDD Min 2.7 -- Typ -- 350 Max 5.5 -- Units Conditions A All digital inputs are grounded, analog output (VOUT) is unloaded. Code = 000h POR circuit is turned off POR circuit remains turned on Hardware Shutdown Current Software Shutdown Current Power-on Reset threshold DC Accuracy MCP4801 Resolution INL Error DNL MCP4811 Resolution INL Error DNL MCP4821 Resolution INL Error DNL Offset Error Offset Error Temperature Coefficient Gain Error Gain Error Temperature Coefficient Internal Reference Voltage Temperature Coefficient (Note 2) ISHDN ISHDN_SW VPOR -- -- -- 1.5 5 1.85 -- -- -- A A V n INL DNL n INL DNL n INL DNL VOS VOS/C gE 8 -- -- 10 -- -- 12 -- -- -- -- -- -- -- 0.25 0.2 -- 1 0.2 -- 4 0.25 0.02 -5 -0.10 -3 -- -- -- -- -- -- -- -- -- -- -- -- -- Bits LSb LSb Bits LSb LSb Bits LSb LSb ppm/C Note 1 +25C to +125C % of FSR Code = 0x000h Note 1 Note 1 % of FSR Code = 0xFFFh, not including offset error ppm/C G/C VREF Internal Voltage Reference (VREF) -- -- -- -- -- Output Noise (VREF Noise) Output Noise Density ENREF (0.1 - 10 Hz) eNREF (1 kHz) eNREF (10 kHz) 1/f Corner Frequency Note 1: 2: fCORNER -- -- -- -- 2.048 125 0.25 45 0.09 290 1.2 1.0 400 -- -- -- -- -- -- -- -- -- V ppm/C LSb/C ppm/C LSb/C Vp-p V/Hz V/Hz Hz VOUT when G = 1x and Code = 0xFFFh -40C to 0C -40C to 0C 0C to +85C 0C to +85C Code = 0xFFFh, G = 1x Code = 0xFFFh, G = 1x Code = 0xFFFh, G = 1x VREF/C Guaranteed monotonic by design over all codes. This parameter is ensured by design, and not 100% tested. 2010 Microchip Technology Inc. DS22244B-page 5 MCP4801/4811/4821 ELECTRICAL CHARACTERISTIC WITH EXTENDED TEMPERATURE (CONTINUED) Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF. Typical values are at +125C by characterization or simulation. Parameters Output Amplifier Output Swing Sym VOUT Min -- Typ 0.01 to VDD - 0.04 66 0.55 17 4.5 Max -- Units V Conditions Accuracy is better than 1 LSb for VOUT = 10 mV to (VDD - 40 mV) Phase Margin Slew Rate Short Circuit Current Settling Time PM SR ISC tSETTLING -- -- -- -- -- -- -- -- Degree () CL = 400 pF, RL = V/s mA s Within 1/2 LSb of final value from 1/4 to 3/4 full-scale range 1 LSb change around major carry (0111...1111 to 1000...0000) Dynamic Performance (Note 2) Major Code Transition Glitch Digital Feedthrough Note 1: 2: -- 45 -- nV-s -- <10 -- nV-s Guaranteed monotonic by design over all codes. This parameter is ensured by design, and not 100% tested. AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS) Electrical Specifications: Unless otherwise indicated, VDD= 2.7V - 5.5V, TA= -40 to +125C. Typical values are at +25C. Parameters Schmitt Trigger High-Level Input Voltage (All digital input pins) Schmitt Trigger Low-Level Input Voltage (All digital input pins) Hysteresis of Schmitt Trigger Inputs Input Leakage Current Digital Pin Capacitance (All inputs/outputs) Clock Frequency Clock High Time Clock Low Time CS Fall to First Rising CLK Edge Data Input Setup Time Data Input Hold Time SCK Rise to CS Rise Hold Time CS High Time LDAC Pulse Width LDAC Setup Time SCK Idle Time before CS Fall Note 1: Sym VIH VIL VHYS ILEAKAGE CIN, COUT FCLK tHI tLO tCSSR tSU tHD tCHS tCSH tLD tLS tIDLE Min 0.7 V DD Typ -- -- 0.05 VDD -- 10 -- -- -- -- -- -- -- -- -- -- -- Max -- 0.2 VDD -- 1 -- 20 -- -- -- -- -- -- -- -- -- -- Units V V Conditions -- -- -1 -- -- 15 15 40 15 10 15 15 100 40 40 A pF MHz ns ns ns ns ns ns ns ns ns ns SHDN = LDAC = CS = SDI = SCK = VDD or VSS VDD = 5.0V, TA = +25C, fCLK = 1 MHz (Note 1) TA = +25C (Note 1) Note 1 Note 1 Applies only when CS falls with CLK high. (Note 1) Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 This parameter is ensured by design and not 100% tested. DS22244B-page 6 2010 Microchip Technology Inc. MCP4801/4811/4821 tCSH CS tCSSR Mode 1,1 SCK Mode 0,0 tSU SDI MSb in LSb in tHD tIDLE tHI tLO tCHS LDAC tLS tLD FIGURE 1-1: SPI Input Timing Data. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +2.7V to +5.5V, VSS = GND. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 8L-DFN (2x3) Thermal Resistance, 8L-MSOP Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Note 1: JA JA JA JA -- -- -- -- 68 211 90 150 -- -- -- -- C/W C/W C/W C/W TA TA TA -40 -40 -65 -- -- -- +125 +125 +150 C C C Note 1 Sym Min Typ Max Units Conditions The MCP4801/4811/4821 devices operate over this extended temperature range, but with reduced performance. Operation in this range must not cause TJ to exceed the maximum junction temperature of +150C. 2010 Microchip Technology Inc. DS22244B-page 7 MCP4801/4811/4821 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. 0.3 0.2 DNL (LSB) 5 4 3 2 1 0 -1 -2 -3 -4 -5 0 1024 2048 Ambient Temperature 125C 85 25 0 -0.1 -0.2 -0.3 0 1024 2048 Code (Decimal) 3072 4096 INL (LSB) 0.1 3072 4096 Code (Decimal) FIGURE 2-1: DNL vs. Code (MCP4821). FIGURE 2-4: INL vs. Code and Temperature (MCP4821). 2.5 Absolute INL (LSB) 2 1.5 1 0.5 0 0.2 0.1 DNL (LSB) 0 -0.1 -0.2 0 1024 2048 3072 125C 85C 4096 25C -40 -20 0 20 40 60 80 100 120 Code (Decimal) Ambient Temperature (C) FIGURE 2-2: DNL vs. Code and Temperature (MCP4821). 0.0766 Absolute DNL (LSB) 0.0764 0.0762 0.076 0.0758 0.0756 0.0754 0.0752 0.075 -40 -20 0 20 40 60 80 100 120 FIGURE 2-5: Absolute INL vs. Temperature (MCP4821). 2 0 INL (LSB) -2 -4 -6 0 1024 2048 Code (Decimal) 3072 4096 Ambient Temperature (C) FIGURE 2-3: Absolute DNL vs. Temperature (MCP4821). FIGURE 2-6: Note: INL vs. Code (MCP4821). Single device graph for illustration of 64 code effect. DS22244B-page 8 2010 Microchip Technology Inc. MCP4801/4811/4821 Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. 0.3 - 40 C o 0.6 0.5 0.4 INL (LSB) 0.3 0.2 0.1 0 -0.1 125oC - 40oC 85 C o 0.2 DNL (LSB) 0.1 0 -0.1 -0.2 -0.3 0 128 256 384 512 640 768 896 1024 +25oC to +125oC -0.2 -0.3 0 32 64 25oC 96 128 Code 160 192 224 256 Code FIGURE 2-7: DNL vs. Code and Temperature (MCP4811). 1.5 1 0.5 85oC FIGURE 2-10: INL vs. Code and Temperature (MCP4801). 2.050 2.049 2.048 2.047 2.046 2.045 2.044 2.043 2.042 2.041 2.040 -40 -20 0 20 40 60 INL (LSB) 0 -0.5 -1 -1.5 -2 -2.5 -3 0 128 256 384 125 C o Full Scale VOUT (V) VDD: 4V VDD: 3V VDD: 2.7V 25oC - 40 C o 512 640 768 896 1024 80 100 120 Code Ambient Temperature (C) FIGURE 2-8: INL vs. Code and Temperature (MCP4811). 0.15 0.1 DNL (LSB) 0.05 0 34 FIGURE 2-11: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 1x. 4.100 Full Scale VOUT (V) 4.096 4.092 4.088 4.084 4.080 4.076 VDD: 5.5V VDD: 5V Temperature: - 40 C to +125 C o o -0.05 -0.1 -0.15 0 32 64 96 128 160 192 224 256 Code -40 -20 0 20 40 60 80 100 120 Ambient Temperature (C) FIGURE 2-9: DNL vs. Code and Temperature (MCP4801). FIGURE 2-12: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 2x. 2010 Microchip Technology Inc. DS22244B-page 9 MCP4801/4811/4821 Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. 100 1.E-04 20 18 16 14 12 10 8 6 4 2 0 265 270 275 280 285 290 295 300 305 310 315 345 320 350 >320 >350 Output Noise Voltage Density (V/Hz) 1.E-05 10 1 1.E-06 0.1 1.E-07 0.1 1E-1 1 1E+0 10 1E+1 100 1E+2 1k 1E+3 10k 1E+4 100k 1E+5 Occurrence Frequency (Hz) IDD (A) FIGURE 2-13: Output Noise Voltage Density (VREF Noise Density) vs. Frequency. Gain = 1x. 1.E-02 10.0 Output Noise Voltage (mV) FIGURE 2-16: IDD Histogram (VDD = 2.7V). 18 16 14 Eni (in VP-P) 1.E-03 1.00 Occurrence Maximum Measurement Time = 10s 12 10 8 6 4 2 0 285 290 295 300 305 310 315 320 325 330 335 IDD (A) 340 0.10 1.E-04 Eni (in VRMS) 0.01 1.E-05 100 1E+2 1k 1E+3 10k 100k 1E+4 1E+5 Bandwidth (Hz) 1M 1E+6 FIGURE 2-14: Output Noise Voltage (VREF Noise Voltage) vs. Bandwidth. Gain = 2x. 340 320 300 5.5V 5.0V 4.0V 3.0V 2.7V VDD FIGURE 2-17: IDD Histogram (VDD = 5.0V). IDD (A) 280 260 240 220 200 180 -40 -20 0 20 40 60 80 100 120 Ambient Temperature (C) FIGURE 2-15: IDD vs. Temperature and VDD. DS22244B-page 10 2010 Microchip Technology Inc. MCP4801/4811/4821 Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. 0.7 0.6 0.5 5.5V 5.0V 4.0V 3.0V 2.7V VDD -0.05 -0.1 -0.15 VDD 5.5V 5.0V 4.0V 3.0V 2.7V Gain Error (%) ISHDN (A) -0.2 -0.25 -0.3 -0.35 -0.4 0.4 0.3 0.2 0.1 0 -40 -20 0 20 40 60 80 100 120 -0.45 -0.5 -40 -20 0 20 40 60 80 100 120 Ambient Temperature (C) Ambient Temperature (C) FIGURE 2-18: Hardware Shutdown Current vs. Temperature and VDD. 4 3.5 5.5V 5.0V FIGURE 2-21: and VDD. 4 3.5 Gain Error vs. Temperature VDD 5.5V 5.0V ISHDN_SW (A) 3 2.5 VIN Hi Threshold (V) 4.0V 3 2.5 2 3.0V 4.0V 3.0V 2 1.5 1 -40 -20 0 20 40 60 80 100 120 2.7V V DD 1.5 1 -40 -20 0 20 40 60 80 100 120 2.7V Ambient Temperature (C) Ambient Temperature (C) FIGURE 2-19: Software Shutdown Current vs. Temperature and VDD. 0.11 FIGURE 2-22: VIN High Threshold vs. Temperature and VDD. 1.6 VDD 5.5V 5.0V VIN Low Threshold (V) 0.09 Offset Error (%) 0.07 0.05 5.5V 1.5 1.4 1.3 1.2 0.03 0.01 -0.01 -0.03 -40 -20 0 20 40 60 80 100 120 Ambient Temperature (C) VDD 4.0V 1.1 1 0.9 0.8 -40 -20 0 20 40 60 80 100 120 3.0V 2.7V 5.0V 4.0V 3.0V 2.7V Ambient Temperature (C) FIGURE 2-20: and VDD. Offset Error vs. Temperature FIGURE 2-23: VIN Low Threshold vs. Temperature and VDD. 2010 Microchip Technology Inc. DS22244B-page 11 MCP4801/4811/4821 Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. 2.5 2.25 16 VDD 5.5V 5.0V VIN_SPI Hysteresis (V) 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -40 -20 0 20 40 60 80 100 120 IOUT_HI_SHORTED (mA) 2 15 14 13 12 11 10 -40 -20 0 20 40 60 80 100 120 5.5V 5.0V 4.0V 3.0V 2.7V VDD 4.0V 3.0V 2.7V Ambient Temperature (C) Ambient Temperature (C) FIGURE 2-24: Input Hysteresis vs. Temperature and VDD. 0.035 0.033 4.0V FIGURE 2-27: IOUT High Short vs. Temperature and VDD. 6.0 5.0 VREF = 4.096V VOUT_HI Limit (VDD-Y)(V) 0.031 0.029 VOUT (V) 4.0 3.0 2.0 1.0 0.0 0.027 0.025 0.023 0.021 0.019 0.017 0.015 -40 -20 0 20 40 60 80 100 120 3.0V 2.7V VDD Output Shorted to VDD Output Shorted to VSS 0 2 4 Ambient Temperature (C) 6 8 10 IOUT (mA) 12 14 16 FIGURE 2-25: VOUT High Limit vs.Temperature and VDD. 0.0028 VDD 5.5V 5.0V 4.0V 3.0V 2.7V FIGURE 2-28: IOUT vs. VOUT. Gain = 2x. VOUT_LOW Limit (Y-AVSS)(V) 0.0026 0.0024 0.0022 0.0020 0.0018 0.0016 0.0014 0.0012 0.0010 -40 -20 0 20 40 60 80 100 120 Ambient Temperature (C) FIGURE 2-26: VOUT Low Limit vs. Temperature and VDD. DS22244B-page 12 2010 Microchip Technology Inc. MCP4801/4811/4821 Note: Unless otherwise indicated, TA = +25C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. VOUT VOUT SCK LDAC Time (1 s/div) LDAC Time (1 s/div) FIGURE 2-29: VOUT Rise Time. FIGURE 2-32: VOUT Rise Time. VOUT VOUT SCK SCK LDAC Time (1 s/div) LDAC Time (1 s/div) FIGURE 2-30: VOUT Fall Time. FIGURE 2-33: Shutdown. VOUT Rise Time Exit VOUT SCK LDAC Time (1 s/div) Frequency (Hz) FIGURE 2-31: VOUT Rise Time. FIGURE 2-34: Ripple Rejection (dB) PSRR vs. Frequency. 2010 Microchip Technology Inc. DS22244B-page 13 MCP4801/4811/4821 NOTES: DS22244B-page 14 2010 Microchip Technology Inc. MCP4801/4811/4821 3.0 PIN DESCRIPTIONS PIN FUNCTION TABLE FOR MCP4801/4811/4821 Symbol DFN 1 2 3 4 5 6 7 8 9 VDD CS SCK SDI LDAC SHDN VSS VOUT EP Supply Voltage Input (2.7V to 5.5V) Chip Select Input Serial Clock Input Serial Data Input DAC Output Synchronization Input. This pin is used to transfer the input register (DAC settings) to the output register (VOUT) Hardware Shutdown Input Ground reference point for all circuitry on the device DAC Analog Output Exposed thermal pad. This pad must be connected to VSS in application Description The descriptions of the pins are listed in Table 3-1. TABLE 3-1: MCP4801/4811/4821 MSOP, PDIP, SOIC, DFN 1 2 3 4 5 6 7 8 -- 3.1 Supply Voltage Pins (VDD, VSS) 3.4 Serial Data Input (SDI) VDD is the positive supply voltage input pin. The input supply voltage is relative to VSS and can range from 2.7V to 5.5V. The power supply at the VDD pin should be as clean as possible for good DAC performance. Using an appropriate bypass capacitor of about 0.1 F (ceramic) to ground is recommended. An additional 10 F capacitor (tantalum) in parallel is also recommended to further attenuate high-frequency noise present in application boards. VSS is the analog ground pin and the current return path of the device. The user must connect the VSS pin to a ground plane through a low-impedance connection. If an analog ground path is available in the application Printed Circuit Board (PCB), it is highly recommended that the VSS pin be tied to the analog ground path or isolated within an analog ground plane of the circuit board. SDI is the SPI compatible serial data input pin. 3.5 Latch DAC Input (LDAC) LDAC (latch DAC synchronization input) pin is used to transfer the input latch register to the DAC register (output latches, VOUT). When this pin is low, VOUT is updated with input register content. This pin can be tied to low (VSS) if the VOUT update is desired at the rising edge of the CS pin. This pin can be driven by an external control device such as an MCU I/O pin. 3.6 Analog Output (VOUT) 3.2 Chip Select (CS) VOUT is the DAC analog output pin. The DAC output has an output amplifier. The full-scale range of the DAC output is from VSS to G*VREF, where G is the gain selection option (1x or 2x). The DAC analog output cannot go higher than the supply voltage (VDD). CS is the Chip Select input pin, which requires an active low to enable serial clock and data functions. 3.7 Exposed Thermal Pad (EP) 3.3 Serial Clock Input (SCK) There is an internal electrical connection between the exposed thermal pad (EP) and the VSS pin. They must be connected to the same potential on the PCB. SCK is the SPI compatible serial clock input pin. 2010 Microchip Technology Inc. DS22244B-page 15 MCP4801/4811/4821 NOTES: DS22244B-page 16 2010 Microchip Technology Inc. MCP4801/4811/4821 4.0 GENERAL OVERVIEW The MCP4801, MCP4811 and MCP4821 are single channel voltage-output 8-bit, 10-bit and 12-bit DAC devices, respectively. These devices include rail-to-rail output amplifier, internal voltage reference, shutdown and reset-management circuitry. The devices use an SPI serial communication interface and operate with a single supply voltage from 2.7V to 5.5V. The DAC input coding of these devices is straight binary. Equation 4-1 shows the DAC analog output voltage calculation. 1 LSb is the ideal voltage difference between two successive codes. Table 4-1 illustrates the LSb calculation of each device. TABLE 4-1: Device MCP4801 (n = 8) MCP4811 (n = 10) MCP4821 (n = 12) LSb OF EACH DEVICE Gain Selection 1x 2x 1x 2x 1x 2x LSb Size 2.048V/256 = 8 mV 4.096V/256 = 16 mV 2.048V/1024 = 2 mV 4.096V/1024 = 4 mV 2.048V/4096 = 0.5 mV 4.096V/4096 = 1 mV EQUATION 4-1: ANALOG OUTPUT VOLTAGE (VOUT) 2.048V Dn = ---------------------------------- G n 2 4.0.1 INL ACCURACY V OUT Where: 2.048V Dn G = = = = = n = = = = Internal voltage reference DAC input code Gain selection 2 for Integral Non-Linearity (INL) error is the maximum deviation between an actual code transition point and its corresponding ideal transition point once offset and gain errors have been removed. The two endpoints method (from 0x000 to 0xFFF) is used for the calculation. Figure 4-1 shows the details. A positive INL error represents transition(s) later than ideal. A negative INL error represents transition(s) earlier than ideal. INL < 0 111 110 101 Digital Input Code 100 011 010 001 000 INL < 0 DAC Output Ideal Transfer Function Actual Transfer Function The ideal output range of each device is: * MCP4801 (n = 8) (a) 0.0V to 255/256 * 2.048V when gain setting = 1x. (b) 0.0V to 255/256 * 4.096V when gain setting = 2x. * MCP4811 (n = 10) (a) 0.0V to 1023/1024 * 2.048V when gain setting = 1x. (b) 0.0V to 1023/1024 * 4.096V when gain setting = 2x. * MCP4821 (n = 12) (a) 0.0V to 4095/4096 * 2.048V when gain setting = 1x. (b) 0.0V to 4095/4096 * 4.096V when gain setting = 2x. Note: See the output swing voltage specification in Section 1.0 "Electrical Characteristics". FIGURE 4-1: Example for INL Error. 2010 Microchip Technology Inc. DS22244B-page 17 MCP4801/4811/4821 4.0.2 DNL ACCURACY 4.1 4.1.1 Circuit Descriptions OUTPUT AMPLIFIER A Differential Non-Linearity (DNL) error is the measure of the variations in code widths from the ideal code width. A DNL error of zero indicates that every code is exactly 1 LSb wide. 111 110 101 Digital Input Code 100 011 010 001 000 Actual Transfer Function The analog DAC output is buffered with a low-power, precision CMOS amplifier. This amplifier provides low offset voltage and low noise. The output stage enables the device to operate with output voltages close to the power supply rails. Refer to Section 1.0 "Electrical Characteristics" for the analog output voltage range and load conditions. In addition to resistive load-driving capability, the amplifier will also drive high capacitive loads without oscillation. The amplifier's strong output allows VOUT to be used as a programmable voltage reference in a system. Ideal Transfer Function 4.1.1.1 Wide Code, >1 LSb Narrow Code, <1 LSb DAC Output Programmable Gain Block The rail-to-rail output amplifier has two configurable gain options: a gain of 1x ( 4.1.2 VOLTAGE REFERENCE FIGURE 4-2: 4.0.3 Example for DNL Error. OFFSET ERROR Offset error is the deviation from zero voltage output when the digital input code is zero. The MCP4801/4811/4821 devices utilize internal 2.048V voltage reference. The voltage reference has a low temperature coefficient and low noise characteristics. Refer to Section 1.0 "Electrical Characteristics" for the voltage reference specifications. 4.0.4 GAIN ERROR Gain error is the deviation from the ideal output, VREF - 1 LSb, excluding the effects of offset error. DS22244B-page 18 2010 Microchip Technology Inc. MCP4801/4811/4821 4.1.3 POWER-ON RESET CIRCUIT 4.1.4 SHUTDOWN MODE The internal Power-on Reset (POR) circuit monitors the power supply voltage (VDD) during the device operation. The circuit also ensures that the DAC powers up with high output impedance ( Supply Voltages 5V VPOR VDD - VPOR Transient Duration The device will remain in Shutdown mode until the VOUT OP Amp Time Transient Duration (s) 10 8 TA = +25C Power-Down Control Circuit Resistive Load Resistive String DAC 500 k 6 4 2 0 Transients below the curve will NOT cause a reset Transients above the curve will cause a reset FIGURE 4-4: Mode. 5 Output Stage for Shutdown 1 2 3 4 VDD - VPOR (V) FIGURE 4-3: Typical Transient Response. 2010 Microchip Technology Inc. DS22244B-page 19 MCP4801/4811/4821 NOTES: DS22244B-page 20 2010 Microchip Technology Inc. MCP4801/4811/4821 5.0 5.1 SERIAL INTERFACE Overview 5.2 Write Command The MCP4801/4811/4821 devices are designed to interface directly with the Serial Peripheral Interface (SPI) port, available on many microcontrollers, and supports Mode 0,0 and Mode 1,1. Commands and data are sent to the device via the SDI pin, with data being clocked-in on the rising edge of SCK. The communications are unidirectional and, thus, data cannot be read out of the MCP4801/4811/4821 devices. The CS pin must be held low for the duration of a write command. The write command consists of 16 bits and is used to configure the DAC's control and data latches. Register 5-1 to Register 5-3 detail the input register that is used to configure and load the DAC register for each device. Figure 5-1 to Figure 5-3 show the write command for each device. Refer to Figure 1-1 and the SPI Timing Specifications Table for detailed input and output timing specifications for both Mode 0,0 and Mode 1,1 operation. The write command is initiated by driving the CS pin low, followed by clocking the four Configuration bits and the 12 data bits into the SDI pin on the rising edge of SCK. The CS pin is then raised, causing the data to be latched into the DAC's input register. The MCP4801/4811/4821 devices utilize a doublebuffered latch structure to allow the DAC output to be synchronized with the LDAC pin, if desired. By bringing down the LDAC pin to a low state, the content stored in the DAC's input register is transferred into the DAC's output register (VOUT), and VOUT is updated. All writes to the MCP4801/4811/4821 devices are 16-bit words. Any clocks after the first 16th clock will be ignored. The Most Significant four bits are Configuration bits. The remaining 12 bits are data bits. No data can be transferred into the device with CS high. The data transfer will only occur if 16 clocks have been transferred into the device. If the rising edge of CS occurs prior, shifting of data into the input register will be aborted. 2010 Microchip Technology Inc. DS22244B-page 21 MCP4801/4811/4821 REGISTER 5-1: W-x 0 bit 15 W-x -- W-x GA WRITE COMMAND REGISTER FOR MCP4821 (12-BIT DAC) W-0 SHDN W-x D11 W-x D10 W-x D9 W-x D8 W-x D7 W-x D6 W-x D5 W-x D4 W-x D3 W-x D2 W-x D1 W-x D0 bit 0 REGISTER 5-2: W-x 0 bit 15 W-x -- W-x GA WRITE COMMAND REGISTER FOR MCP4811 (10-BIT DAC) W-0 SHDN W-x D9 W-x D8 W-x D7 W-x D6 W-x D5 W-x D4 W-x D3 W-x D2 W-x D1 W-x D0 W-x x W-x x bit 0 REGISTER 5-3: W-x 0 bit 15 Where: W-x -- W-x GA WRITE COMMAND REGISTER FOR MCP4801 (8-BIT DAC) W-0 SHDN W-x D7 W-x D6 W-x D5 W-x D4 W-x D3 W-x D2 W-x D1 W-x D0 W-x x W-x x W-x x W-x x bit 0 bit 15 ( 1) 0 = Write to DAC register 1 = Ignore this command bit 14 bit 13 -- Don't Care GA: Output Gain Selection bit 1 = 1x (VOUT = VREF * D/4096) 0 = 2x (VOUT = 2 * VREF * D/4096), where internal VREF = 2.048V. SHDN: Output Shutdown Control bit 1 = Active mode operation. VOUT is available. 0 = Shutdown the device. Analog output is not available. VOUT pin is connected to 500 ktypical) D11:D0: DAC Input Data bits. Bit x is ignored. bit 12 bit 11-0 Legend R = Readable bit -n = Value at POR W = Writable bit 1 = bit is set U = Unimplemented bit, read as `0' 0 = bit is cleared x = bit is unknown Note 1: This bit must be `0'. The device ignores the write command if this MSB bit is not `0'. DS22244B-page 22 2010 Microchip Technology Inc. MCP4801/4811/4821 CS 0 SCK config bits SDI 12 data bits 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (Mode 1,1) (Mode 0,0) 0 -- GA SHDN D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LDAC VOUT FIGURE 5-1: Write Command for MCP4821 (12-bit DAC). CS 0 SCK config bits SDI 12 data bits X X 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (Mode 1,1) (Mode 0,0) 0 -- GA SHDN D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LDAC VOUT Note: X = "don't care" bits. FIGURE 5-2: Write Command for MCP4811 (10-bit DAC). CS 0 SCK config bits SDI 12 data bits X X X X 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (Mode 1,1) (Mode 0,0) 0 -- GA SHDN D7 D6 D5 D4 D3 D2 D1 D0 LDAC VOUT Note: X = "don't care" bits. FIGURE 5-3: Write Command for MCP4801 (8-bit DAC). 2010 Microchip Technology Inc. DS22244B-page 23 MCP4801/4811/4821 NOTES: DS22244B-page 24 2010 Microchip Technology Inc. MCP4801/4811/4821 6.0 TYPICAL APPLICATIONS 6.3 Output Noise Considerations The MCP4801/4811/4821 family of devices are general purpose, single channel voltage output DACs for various applications where a precision operation with low-power and internal voltage reference is required. Applications generally suited for the devices are: * * * * * Set Point or Offset Trimming Sensor Calibration Precision Selectable Voltage Reference Portable Instrumentation (Battery-Powered) Calibration of Optical Communication Devices The voltage noise density (in V/Hz) is illustrated in Figure 2-13. This noise appears at VOUT, and is primarily a result of the internal reference voltage. Its 1/f corner (fCORNER) is approximately 400 Hz. Figure 2-14 illustrates the voltage noise (in mVRMS or mVP-P). A small bypass capacitor on VOUT is an effective method to produce a single-pole Low-Pass Filter (LPF) that will reduce this noise. For instance, a bypass capacitor sized to produce a 1 kHz LPF would result in an ENREF of about 100 VRMS. This would be necessary when trying to achieve the low DNL error performance (at G = 1x) that the MCP4801/4811/4821 devices are capable of. The tested range for stability is .001 F through 4.7 F. VDD C1 = 10 F C2 = 0.1 F VDD C1 C1 VOUT 1 F C2 MCP48x1 SDI PIC(R) Microcontroller VSS C2 C1 VDD C2 6.1 Digital Interface The MCP4801/4811/4821 devices utilize a 3-wire synchronous serial protocol to transfer the DAC's setup and input codes from the digital devices. The serial protocol can be interfaced to SPI or Microwire peripherals which are common on many microcontroller units (MCUs), including Microchip's PIC(R) MCUs and dsPIC(R) DSCs. In addition to the three serial connections (CS, SCK and SDI), the LDAC signal synchronizes the DAC output with LDAC pin event. By bringing the LDAC pin down "low", the DAC input codes and settings in the DAC input register are latched into the output register, and the DAC analog output is updated. Figure 6-1 shows an example of the pin connections. Note that the LDAC pin can be tied low (VSS) to reduce the required connections from 4 to 3 I/O pins. In this case, the DAC output can be immediately updated when a valid 16 clock transmission has been received and the CS pin has been raised. CS MCP48x1 VOUT 1 F SDI AVSS SDO SCK LDAC CS0 6.2 Power Supply Considerations AVSS The typical application will require a bypass capacitor to filter out noise in the power supply traces. The noise can be induced onto the power supply's traces from various events such as digital switching or as a result of changes on the DAC's output. The bypass capacitor helps minimize the effect of these noise sources. Figure 6-1 illustrates an appropriate bypass strategy. In this example, two bypass capacitors are used in parallel: (a) 0.1 F (ceramic) and (b)10 F (tantalum). These capacitors should be placed as close to the device power pin (VDD) as possible (within 4 mm). The power source supplying these devices should be as clean as possible. If the application circuit has separate digital and analog power supplies, VDD and VSS of the device should reside on the analog plane. FIGURE 6-1: Diagram. Typical Connection 6.4 Layout Considerations Inductively-coupled AC transients and digital switching noises can degrade the output signal integrity, and potentially reduce the device performance. Careful board layout will minimize these effects and increase the Signal-to-Noise Ratio (SNR). Bench testing has shown that a multi-layer board utilizing a low-inductance ground plane, isolated inputs and isolated outputs with proper decoupling, is critical for the best performance. Particularly harsh environments may require shielding of critical signals. Breadboards and wire-wrapped boards are not recommended if low noise is desired. 2010 Microchip Technology Inc. DS22244B-page 25 MCP4801/4811/4821 6.5 Single-Supply Operation 6.5.1.1 Decreasing Output Step Size The MCP4801/4811/4821 devices are rail-to-rail voltage output DAC devices designed to operate with a VDD range of 2.7V to 5.5V. Its output amplifier is robust enough to drive small-signal loads directly. Therefore, it does not require any external output buffer for most applications. If the application is calibrating the bias voltage of a diode or transistor, a bias voltage range of 0.8V may be desired with about 200 V resolution per step. Two common methods to achieve a 0.8V range are to either reduce VREF to 0.82V (using the MCP49XX family device that uses external reference) or use a voltage divider on the DAC's output. Using a VREF is an option if the VREF is available with the desired output voltage range. However, occasionally, when using a low-voltage VREF, the noise floor causes SNR error that is intolerable. Using a voltage divider method is another option and provides some advantages when VREF needs to be very low or when the desired output voltage is not available. In this case, a larger value VREF is used while two resistors scale the output range down to the precise desired level. Example 6-1 illustrates this concept. Note that the bypass capacitor on the output of the voltage divider plays a critical function in attenuating the output noise of the DAC and the induced noise from the environment. 6.5.1 DC SET POINT OR CALIBRATION A common application for the devices is a digitallycontrolled set point and/or calibration of variable parameters, such as sensor offset or slope. For example, the MCP4821 and MCP4822 provide 4096 output steps. If G = 1x is selected, the internal 2.048V VREF would produce 500 V of resolution. If G = 2x is selected, the internal 2.048 VREF would produce 1 mV of resolution. EXAMPLE 6-1: EXAMPLE CIRCUIT OF SET POINT OR THRESHOLD CALIBRATION VDD (a) Single Output DAC: MCP4801 MCP4811 MCP4821 (b) Dual Output DAC: MCP4802 MCP4812 MCP4822 VDD R1 RSENSE VCC+ Comparator VTRIP VCC- DAC VOUT R2 SPI 3-wire Dn VOUT = 2.048 G -----N 2 R2 V trip = VOUT -------------------- R1 + R2 0.1 F G Dn = = = = Gain selection (1x or 2x) Digital value of DAC (0-255) for MCP4801/MCP4802 Digital value of DAC (0-1023) for MCP4811/MCP4812 Digital value of DAC (0-4095) for MCP4821/MCP4822 DAC bit resolution N = DS22244B-page 26 2010 Microchip Technology Inc. MCP4801/4811/4821 6.5.1.2 Building a "Window" DAC When calibrating a set point or threshold of a sensor, typically only a small portion of the DAC output range is utilized. If the LSb size is adequate enough to meet the application's accuracy needs, the unused range is sacrificed without consequences. If greater accuracy is needed, then the output range will need to be reduced to increase the resolution around the desired threshold. If the threshold is not near VREF, 2VREF or VSS, then creating a "window" around the threshold has several advantages. One simple method to create this "window" is to use a voltage divider network with a pullup and pull-down resistor. Example 6-2 and Example 6-4 illustrate this concept. EXAMPLE 6-2: SINGLE-SUPPLY "WINDOW" DAC (a) Single Output DAC: MCP4801 MCP4811 MCP4821 (b) Dual Output DAC: MCP4802 MCP4812 MCP4822 VCC+ VDD VOUT R1 R3 RSENSE VCC+ Comparator VTRIP 0.1 F VCCVCC- DAC R2 SPI 3-wire Dn V OUT = 2.048 G -----N 2 G Dn = = = = N = Gain selection (1x or 2x) Digital value of DAC (0-255) for MCP4801/MCP4802 Digital value of DAC (0-1023) for MCP4811/MCP4812 Digital value of DAC (0-4095) for MCP4821/MCP4822 DAC bit resolution Thevenin Equivalent R2R3 R 23 = -----------------R2 + R3 V 23 VCC+ R2 + VCC- R 3 = -----------------------------------------------------R2 + R3 R1 VOUT VO R23 V23 VOUT R 23 + V 23 R 1 V trip = -------------------------------------------R1 + R 23 2010 Microchip Technology Inc. DS22244B-page 27 MCP4801/4811/4821 6.6 Bipolar Operation Bipolar operation is achievable using the MCP4801/4811/4821 family of devices by utilizing an external operational amplifier (op amp). This configuration is desirable due to the wide variety and availability of op amps. This allows a general purpose DAC, with its cost and availability advantages, to meet almost any desired output voltage range, power and noise performance. Example 6-3 illustrates a simple bipolar voltage source configuration. R1 and R2 allow the gain to be selected, while R3 and R4 shift the DAC's output to a selected offset. Note that R4 can be tied to VDD, instead of VSS, if a higher offset is desired. Also note that a pull-up to VDD could be used instead of R4, or in addition to R4, if a higher offset is desired. EXAMPLE 6-3: DIGITALLY-CONTROLLED BIPOLAR VOLTAGE SOURCE R2 VDD VDD VOUT DAC R4 SPI 3-wire R3 VIN+ 0.1 F VCC- R1 VCC+ VO (a) Single Output DAC: MCP4801 MCP4811 MCP4821 (b) Dual Output DAC: MCP4802 MCP4812 MCP4822 Dn V OUT = 2.048 G -----N 2 V OUT R 4 V IN+ = ------------------R3 + R4 R2 R2 VO = VIN+ 1 + ----- - VDD ----- R 1 R 1 G Dn = = = = Gain selection (1x or 2x) Digital value of DAC (0-255) for MCP4801/MCP4802 Digital value of DAC (0-1023) for MCP4811/MCP4812 Digital value of DAC (0-4095) for MCP4821/MCP4822 DAC bit resolution N = 6.6.1 DESIGN EXAMPLE: DESIGN A BIPOLAR DAC USING EXAMPLE 6-3 WITH 12-BIT MCP4821 OR MCP4822 The equation can be simplified to: - R2 - 2.05 -------- = ---------------R1 4.096V R2 1 ----- = -R1 2 An output step magnitude of 1 mV, with an output range of 2.05V, is desired for a particular application. Step 1: Calculate the range: +2.05V - (-2.05V) = 4.1V. Step 2: Calculate the resolution needed: 4.1V/1 mV = 4100 Since 212 = 4096, 12-bit resolution is desired. Step 3: The amplifier gain (R2/R1), multiplied by fullscale VOUT (4.096V), must be equal to the desired minimum output to achieve bipolar operation. Since any gain can be realized by choosing resistor values (R1+R2), the VREF value must be selected first. If a VREF of 4.096V is used (G=2), solve for the amplifier's gain by setting the DAC to 0, knowing that the output needs to be -2.05V. If R1 = 20 k and R2 = 10 k, the gain will be 0.5. Step 4: Next solve for R3 and R4 by setting the DAC to 4096, knowing that the output needs to be +2.05V. R4 2 2.05V + 0.5 4.096V ----------------------- = ------------------------------------------------------- = - R3 + R4 1.5 4.096V 3 If R4 = 20 k, then R3 = 10 k DS22244B-page 28 2010 Microchip Technology Inc. MCP4801/4811/4821 6.7 Selectable Gain and Offset Bipolar Voltage Output This circuit is typically used for linearizing a sensor whose slope and offset varies. The equation to design a bipolar "window" DAC would be utilized if R3, R4 and R5 are populated. In some applications, precision digital control of the output range is desirable. Example 6-4 illustrates how to use the MCP4801/4811/4821 family of devices to achieve this in a bipolar or single-supply application. EXAMPLE 6-4: BIPOLAR VOLTAGE SOURCE WITH SELECTABLE GAIN AND OFFSET R2 VDD VOUTA DACA VDD (DACA for Gain Adjust) VCC+ R5 VIN+ VO R1 VCC+ VOUTB DACB R3 (DACB for Offset Adjust) SPI 3 Dn VOUTA = 2.048 G A -----N 2 Dn V OUTB = 2.048 G B -----N 2 V IN+ V OUTB R4 + V CC- R3 = -----------------------------------------------R3 + R4 G N Dn R4 VCC- 0.1 F VCC- = = = = = Gain selection (1x or 2x) DAC bit resolution Digital value of DAC (0-255) for MCP4801 Digital value of DAC (0-1023) for MCP4811 Digital value of DAC (0-4095) for MCP4821 R2 R2 VO = V IN+ 1 + ----- - VOUTA ----- R 1 R 1 Offset Adjust Gain Adjust Bipolar "Window" DAC using R4 and R5 Thevenin Equivalent V CC+ R 4 + VCC- R 5 V 45 = -------------------------------------------R 4 + R5 V OUTB R 45 + V 45 R3 VIN+ = ----------------------------------------------R3 + R45 R4 R5 R 45 = -----------------R4 + R5 R2 R2 - VO = VIN+ 1 + ----- - V OUTA ----- R1 R1 Offset Adjust Gain Adjust 2010 Microchip Technology Inc. DS22244B-page 29 MCP4801/4811/4821 6.8 Designing a Double-Precision DAC Step 1: Calculate the resolution needed: 4.1V/1 V = 4.1 x 106. Since 222 = 4.2 x 106, 22-bit resolution is desired. Since DNL = 0.75 LSb, this design can be done with the 12-bit MCP4821 or MCP4822 DAC devices. Step 2: Since DACB's VOUTB has a resolution of 1 mV, its output only needs to be "pulled" 1/1000 to meet the 1 V target. Dividing VOUTA by 1000 would allow the application to compensate for DACB's DNL error. Step 3: If R2 is 100, then R1 needs to be 100 k. Step 4: The resulting transfer function is shown in the equation of Example 6-5. Example 6-5 illustrates how to design a single-supply voltage output capable of up to 24-bit resolution by using 12-bit DACs. This design is simply a voltage divider with a buffered output. As an example, if an application similar to the one developed in Section 6.6.1 "Design Example: Design a Bipolar DAC Using Example 6-3 with 12bit MCP4821 or MCP4822" required a resolution of 1 V instead of 1 mV, and a range of 0V to 4.1V, then 12-bit resolution would not be adequate. EXAMPLE 6-5: VDD SIMPLE, DOUBLE-PRECISION DAC WITH MCP4821 VCC+ DACA VOUTA for Fine Adjustment R1 R1 >> R2 VDD VOUTB for Fine Adjustment R2 0.1 F VCC- VO DACB SPI 3-wire DA VOUTA = 2.048 G A ------12 2 DB V OUTB = 2.048 GB ------12 2 V OUTA R 2 + VOUTB R 1 VO = ----------------------------------------------------R 1 + R2 Gx Dn = = Gain selection (1x or 2x) Digital value of DAC (0-4096) DS22244B-page 30 2010 Microchip Technology Inc. MCP4801/4811/4821 6.9 Building Programmable Current Source However, this also reduces the resolution that the current can be controlled with. The voltage divider, or "window", DAC configuration would allow the range to be reduced, thus increasing resolution around the range of interest. When working with very small sensor voltages, plan on eliminating the amplifier's offset error by storing the DAC's setting under known sensor conditions. Example 6-6 shows an example of building a programmable current source using a voltage follower. The current sensor (sensor resistor) is used to convert the DAC voltage output into a digitally-selectable current source. Adding the resistor network from Example 6-2 would be advantageous in this application. The smaller RSENSE is, the less power dissipated across it. EXAMPLE 6-6: DIGITALLY-CONTROLLED CURRENT SOURCE VDD or VREF (a) Single Output DAC: MCP4801 MCP4811 MCP4821 (b) Dual Output DAC: MCP4802 MCP4812 MCP4822 VDD VCC+ VOUT Load IL Ib DAC SPI 3-wire VCC- RSENSE IL I b = ---- G Dn = = = = Gain selection (1x or 2x) Digital value of DAC (0-255) for MCP4801/MCP4802 Digital value of DAC (0-1023) for MCP4811/MCP4812 Digital value of DAC (0-4095) for MCP4821/MCP4822 DAC bit resolution V OUT I L = -------------- -----------R sense + 1 where Common-Emitter Current Gain N = 2010 Microchip Technology Inc. DS22244B-page 31 MCP4801/4811/4821 NOTES: DS22244B-page 32 2010 Microchip Technology Inc. MCP4801/4811/4821 7.0 7.1 DEVELOPMENT SUPPORT Evaluation & Demonstration Boards The Mixed Signal PICtailTM Demo Board supports the MCP4801/4811/4821 family of devices. Refer to www.microchip.com for further information on this product's capabilities and availability. 2010 Microchip Technology Inc. DS22244B-page 33 MCP4801/4811/4821 NOTES: DS22244B-page 34 2010 Microchip Technology Inc. MCP4801/4811/4821 8.0 8.1 PACKAGING INFORMATION Package Marking Information 8-Lead DFN (2x3) Example: XXX YWW NN AHS 010 25 8-Lead MSOP XXXXXX YWWNNN Example: 4801E 010256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP4821 E/P e3 256 ^ 1010 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Example: MCP4811E e3 SN^^ 1010 256 Legend: XX...X Y YY WW NNN e3 * Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2010 Microchip Technology Inc. DS22244B-page 35 MCP4801/4811/4821 /HDG 3ODVWLF 'XDO )ODW 1R /HDG 3DFNDJH 0& [ [ 1RWH PP %RG\ >')1@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ e b N L D N K E E2 EXPOSED PAD NOTE 1 1 2 D2 TOP VIEW BOTTOM VIEW 2 1 NOTE 1 A A3 A1 NOTE 2 8QLWV 'LPHQVLRQ /LPLWV 0,1 0,//,0(7(56 120 %6& 0$; 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 6WDQGRII &RQWDFW 7KLFNQHVV 2YHUDOO /HQJWK 2YHUDOO :LGWK ([SRVHG 3DG /HQJWK ([SRVHG 3DG :LGWK &RQWDFW :LGWK &RQWDFW /HQJWK &RQWDFW WR ([SRVHG 3DG 1 H $ $ $ ' ( ' ( E / . 5() %6& %6& 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 3DFNDJH PD\ KDYH RQH RU PRUH H[SRVHG WLH EDUV DW HQGV 3DFNDJH LV VDZ VLQJXODWHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ & & DS22244B-page 36 2010 Microchip Technology Inc. MCP4801/4811/4821 /HDG 3ODVWLF 'XDO )ODW 1R /HDG 3DFNDJH 0& [ [ 1RWH PP %RG\ >')1@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ 2010 Microchip Technology Inc. DS22244B-page 37 MCP4801/4811/4821 /HDG 3ODVWLF 0LFUR 6PDOO 2XWOLQH 3DFNDJH 06 >0623@ 1RWH )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D N E E1 NOTE 1 1 2 e b A2 c A A1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV 1 H $ $ $ ( ( ' / / I F L1 0,//,0(7(56 0,1 120 %6& %6& %6& %6& 5() 0$; L /HDG :LGWK E 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ PP SHU VLGH 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ & % DS22244B-page 38 2010 Microchip Technology Inc. MCP4801/4811/4821 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2010 Microchip Technology Inc. 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MCP4801/4811/4821 /HDG 3ODVWLF 6PDOO 2XWOLQH 61 1DUURZ 1RWH PP %RG\ >62,&@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ D e N E E1 NOTE 1 1 2 3 b h c h A A2 A1 L L1 8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK &KDPIHU RSWLRQDO )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV /HDG :LGWK 0ROG 'UDIW $QJOH 7RS 0ROG 'UDIW $QJOH %RWWRP 1 H $ $ $ ( ( ' K / / I F E D E 0,1 0,//,0(7(56 120 %6& %6& %6& %6& 5() 0$; 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 6LJQLILFDQW &KDUDFWHULVWLF 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\ PP SHU VLGH 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ & % 2010 Microchip Technology Inc. DS22244B-page 41 MCP4801/4811/4821 /HDG 3ODVWLF 6PDOO 2XWOLQH 61 1DUURZ 1RWH PP %RG\ >62,&@ )RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ DS22244B-page 42 2010 Microchip Technology Inc. MCP4801/4811/4821 APPENDIX A: REVISION HISTORY Revision A (April 2010) * Original Release of this Document. Revision B (April 2010) * Corrected the "Related Products" table on page 1. 2010 Microchip Technology Inc. DS22244B-page 43 MCP4801/4811/4821 NOTES: DS22244B-page 44 2010 Microchip Technology Inc. MCP4801/4811/4821 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package b) Examples: a) Extended temperature, DFN package MCP4801T-E/MC: Extended temperature, DFN package, Tape and Reel MCP4801-E/MS: Extended temperature, MSOP package. MCP4801T-E/MS: Extended temperature, MSOP package, Tape and Reel. MCP4801-E/P: Extended temperature, PDIP package. MCP4801-E/SN: Extended temperature, SOIC package. MCP4801T-E/SN: Extended temperature, SOIC package, Tape and Reel. Extended temperature, DFN package MCP4811T-E/MC: Extended temperature, DFN package, Tape and Reel MCP4811-E/MS: Extended temperature, MSOP package. MCP4811T-E/MS: Extended temperature, MSOP package, Tape and Reel. MCP4811-E/P: Extended temperature, PDIP package. MCP4811-E/SN: Extended temperature, SOIC package. MCP4811T-E/SN: Extended temperature, SOIC package, Tape and Reel. Extended temperature, DFN package MCP4821T-E/MC: Extended temperature, DFN package, Tape and Reel MCP4821-E/MS: Extended temperature, MSOP package. MCP4821T-E/MS: Extended temperature, MSOP package, Tape and Reel. MCP4821-E/P: Extended temperature, PDIP package. MCP4821-E/SN: Extended temperature, SOIC package. MCP4821T-E/SN: Extended temperature, SOIC package, Tape and Reel. MCP4821-E/MC: MCP4811-E/MC: MCP4801-E/MC: Device MCP4801: MCP4801T: MCP4811: MCP4811T: MCP4821: MCP4821T: 8-Bit Voltage Output DAC 8-Bit Voltage Output DAC (Tape and Reel, DFN, MSOP and SOIC only) 10-Bit Voltage Output DAC 10-Bit Voltage Output DAC (Tape and Reel, DFN, MSOP and SOIC only) 12-Bit Voltage Output DAC 12-Bit Voltage Output DAC (Tape and Reel, DFN, MSOP and SOIC only) c) d) e) f) g) Temperature Range E = -40C to +125C (Extended) a) b) Package MC MS P SN = = = = 8-Lead Plastic Dual Flat, No Lead Package 2x3x0.9 mm Body (DFN) 8-Lead Plastic Micro Small Outline (MSOP) 8-Lead Plastic Dual In-Line (PDIP) 8-Lead Plastic Small Outline - Narrow, 150 mil (SOIC) c) d) e) f) g) a) b) c) d) e) f) g) 2010 Microchip Technology Inc. DS22244B-page 45 MCP4801/4811/4821 NOTES: DS22244B-page 46 2010 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-124-6 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 2010 Microchip Technology Inc. DS22244B-page 47 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 ASIA/PACIFIC India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 01/05/10 DS22244B-page 48 2010 Microchip Technology Inc. |
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